TIE-50407 Data Processing Implementations, 5 cr
Lisätiedot
Suitable for postgraduate studies.
Vastuuhenkilö
Sakari Lahti, Jani Boutellier, Kai Jylkkä
Opetus
| Toteutuskerta | Periodi | Vastuuhenkilö | Suoritusvaatimukset |
| TIE-50407 2018-01 | 1 - 2 |
Jani Boutellier Kai Jylkkä Sakari Lahti |
Written exam and complete compulsory assignments |
Osaamistavoitteet
Student can classify the special features of data processing algorithms and develop applications with fractional representation. Students can describe a data processing application with a data flow graph and analyze the inherent parallelism of the application. Students can realize a simple data processing algorithm on an FPGA circuit and on a multicore processor.
Sisältö
| Sisältö | Ydinsisältö | Täydentävä tietämys | Erityistietämys |
| 1. | number representations in fixed-point and floating-point processors | finite word length effects, overflow management | |
| 2. | Systolic architectures | ||
| 3. | CORDIC | ||
| 4. | data-flow graph representation, loop and iteration bounds | folding of multirate systems | solving inequalities |
| 5. | pipelining, parallel processing, and combined parallel pipelined processing | ||
| 6. | critical path, folding, unfolding, retiming |
Ohjeita opiskelijalle osaamisen tasojen saavuttamiseksi
Written exam 50%, compulsory assignments 50%
Arvosteluasteikko:
Numerical evaluation scale (0-5)
Osasuoritukset:
Oppimateriaali
| Tyyppi | Nimi | Tekijä | ISBN | URL | Lisätiedot | Tenttimateriaali |
| Book | VLSI Digital Signal Processing Systems: Design and Implementation | K. K. Parhi | 0-471-24186-5 | No | ||
| Lecture slides | Yes |
Tietoa esitietovaatimuksista
Basic knowledge on signal processing algorithms is recommended.
Programming skills, e.g. by the course "Programming 2" also mandatory
Vastaavuudet
| Opintojakso | Vastaa opintojaksoa | Selite |
| TIE-50407 Data Processing Implementations, 5 cr | TIE-50406 DSP Implementations, 5 cr |