TIE-50106 Digital Design, 5 cr
Implementation TIE-50106 2018-01
Description
In this course, you will learn how to design digital systems in industry using FPGA platforms. Our special focus area is state machine design, but we cover also combinatorial gate networks. During the course we have practical exercies, in which you learn modern design methodologies and tools used in industry.
This course is the first in a series of three for professional digital systems engineering. In this course you learn schematic design entry. The next is TIE-50206 Logic Synthesis, in which you learn how to use VHDL and HDL languages in general. The third course is TIE-50506 System Design that includes also HW/SW co-design and modern model based design methodologies. The three courses might not be the easiest at TUT, but after them you are ready to start in a company as an FPGA/ASIC or embedded system design engineer.
Lessons
Period |
1 - 2
|
Methods of instruction |
Luento, Tentti, Harjoitusryhmä |
Person responsible |
Timo D. Hämäläinen |
Assessment scale
Numerical evaluation scale (0-5)
Requirements
Passing the compulsory exercises and exam.
Exam |
Thu 20.12.2018 |
17:00 - 20:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 27.08.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 03.09.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 10.09.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 17.09.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 24.09.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 01.10.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 08.10.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 22.10.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 29.10.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 05.11.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 12.11.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 26.11.2018 |
12:00 - 14:00 |
TIE-50106 Digital Design/Lec/01 |
Mon 03.12.2018 |
12:00 - 14:00 |
(Peruttu) TIE-50106 Digital Design/EG04/01 |
Mon 24.09.2018 |
10:00 - 12:00 |
(Peruttu) TIE-50106 Digital Design/EG04/01 |
Mon 01.10.2018 |
10:00 - 12:00 |
(Peruttu) TIE-50106 Digital Design/EG04/01 |
Mon 22.10.2018 |
10:00 - 12:00 |
(Peruttu) TIE-50106 Digital Design/EG04/01 |
Mon 05.11.2018 |
10:00 - 12:00 |
(Peruttu) TIE-50106 Digital Design/EG04/01 |
Mon 19.11.2018 |
10:00 - 12:00 |
TIE-50106 Digital Design/EG05/01 |
Thu 27.09.2018 |
16:00 - 18:00 |
TIE-50106 Digital Design/EG05/01 |
Thu 04.10.2018 |
16:00 - 18:00 |
TIE-50106 Digital Design/EG05/01 |
Thu 25.10.2018 |
16:00 - 18:00 |
TIE-50106 Digital Design/EG05/01 |
Thu 08.11.2018 |
16:00 - 18:00 |
TIE-50106 Digital Design/EG05/01 |
Thu 22.11.2018 |
16:00 - 18:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 14.09.2018 |
08:00 - 11:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 21.09.2018 |
08:00 - 11:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 12.10.2018 |
08:00 - 11:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 02.11.2018 |
08:00 - 11:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 16.11.2018 |
08:00 - 11:00 |
TIE-50106 Digital Design/EG01/01 |
Fri 07.12.2018 |
08:00 - 11:00 |
Study material
Type |
Name |
Author |
ISBN |
Additional information |
Language |
Examination material |
Book |
Introduction to Digital Systems |
Ercegovac, Lang, Moreno |
471527998 |
|
English |
Yes |
Lecture slides |
|
Hämäläinen |
|
|
English |
Yes |