TIE-50256 High-level Synthesis, 5 cr
Implementation TIE-50256 2018-01
Description
High-level synthesis (HLS) is the next step in raising the abstraction level of describing digital systems for FPGA/ASIC. Compared to VHDL/Verilog RTL, HLS allows a faster and more approachable design flow based on languages such as C/C++. On this course, you will learn the fundamentals of HLS and to implement real FPGA applications with it. This is a hands-on course with emphasis on practical exercises and project work.
Lessons
Period |
3 - 4
|
Methods of instruction |
Luento, Harjoitukset |
Person responsible |
Sakari Lahti, Jarno Vanne |
Assessment scale
Numerical evaluation scale (0-5)
Requirements
Passed exam and exercises.
TIE-50256 High-level Synthesis/Lec/01 |
Tue 08.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 15.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 22.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 29.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 05.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 12.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 19.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 05.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 12.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 19.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 26.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 02.04.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 09.04.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Tue 16.04.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 15.01.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 18.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 22.01.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 25.01.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 29.01.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 01.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 05.02.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 08.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 12.02.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 15.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 19.02.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 22.02.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 05.03.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 08.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 12.03.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 15.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 19.03.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 22.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 26.03.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 29.03.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 02.04.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 05.04.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 09.04.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 12.04.2019 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 |
Tue 16.04.2019 |
10:00 - 12:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 26.04.2019 |
14:00 - 16:00 |
Study material
Type |
Name |
Author |
ISBN |
Additional information |
Language |
Examination material |
Book |
High-Level Synthesis Blue Book |
Michael Fingeroff |
978-1450097246 |
The book is available in electric format to the students |
English |
No |
Lecture slides |
|
|
|
|
English |
No |