TIE-50106 Digital Design, 5 cr

Toteutuskerta TIE-50106 2018-01

Kuvaus

In this course, you will learn how to design digital systems in industry using FPGA platforms. Our special focus area is state machine design, but we cover also combinatorial gate networks. During the course we have practical exercies, in which you learn modern design methodologies and tools used in industry.

This course is the first in a series of three for professional digital systems engineering. In this course you learn schematic design entry. The next is TIE-50206 Logic Synthesis, in which you learn how to use VHDL and HDL languages in general. The third course is TIE-50506 System Design that includes also HW/SW co-design and modern model based design methodologies. The three courses might not be the easiest at TUT, but after them you are ready to start in a company as an FPGA/ASIC or embedded system design engineer.

Opetus

Arvosteluasteikko

Numerical evaluation scale (0-5)

Suoritusvaatimukset

Passing the compulsory exercises and exam.

Oppimateriaali