TIE-11206 Special Topics on Pervasive Computing, 1-5 cr

Toteutuskerta TIE-11206 2019-05

Kuvaus

Formal Hardware Verification (2cr)

Opetus

Arvosteluasteikko

Evaluation scale passed/failed will be used on the course

Lisätietoja toteutuksesta

*** Postponed to a later date ***


Tampere University, in co-operation with OneSpin Solutions, organizes an intensive course on formal verification of digital integrated circuits on 6-8.4.2020.

The formal verification is an important method to guarantee functional correctness of modern digital IC designs. The formal verifcation can provide effective verification of designs which can be impossible or impractical to cover in full extend with traditional simulation based methods. The fomal verification is performed on dedicated tools and utilize standards assertion languages such as SystemVerilog Assertions (SVA) as primary input.

The course consists of lectures and hands-on labs which covers the complete formal verification flow from setting up the environment to verification results.