TIE-50506 System Design, 5 cr
Lisätiedot
Note to Finnish students: Kurssin kaikki materiaali on englanniksi, mutta harjoituksissa, tentissä ja muussa kommunikaatiossa voi vastata myös suomeksi riippuen henkilökunnan kielitaidosta. Luennoista voidaan harkinnan varaisesti ja erikseen pyydettäessä järjestää suomenkielisiä tiivistettyjä esityksiä.
Suitable for postgraduate studies.
Vastuuhenkilö
Timo D. Hämäläinen
Opetus
| Toteutuskerta | Periodi | Vastuuhenkilö | Suoritusvaatimukset |
| TIE-50506 2019-01 | 3 - 4 |
Timo D. Hämäläinen Esko Pekkarinen Antti Rautakoura Panu Sjövall |
To pass the course a minimum number of points must be earned from the exercise tasks. Voluntary exam increases the garde. |
Osaamistavoitteet
After completing the course, the student knows the design process of complex embedded systems including several processors, HW IP-blocks, SW platform components and SW applications with real-time constraints. In the exercise work, students practice HW/SW co-design and system integration, verification, and prototyping. Students implement a small video encoding system on FPGA. The first step is creating a behavioral model that is simulated on PC. From it, a set of implementations are created on FPGA board by varying the number of processors and HW IP-blocks. Performance and costs are analysed for the implementations. All this gives a realistic embedded product development experience.
Sisältö
| Sisältö | Ydinsisältö | Täydentävä tietämys | Erityistietämys |
| 1. | Introduction to embedded, multi-processor system-on-chip (SoC) technologies. | International Technology Roadmap for Semiconductors (ITRS) | Complexity of HW and SW and their trends |
| 2. | Importance of design reuse and application portability between HW and SW implementations. | Modularization of HW and SW components. | XML-based metadata for HW/SW component integration. |
| 3. | Principles of model based design with abstraction and orthogonalization of concerns. | Y-model based design process. Specification, synthesis, verification. | Design automation and tools. Management of configurations. |
| 4. | Layered system model and interfaces. | Hardware dependent software, APIs, RTOS | Driver implementation. |
| 5. | Related HW and SW standards and best practises. | IP-XACT, OCP-IP, MCAPI, POSIX, SystemC | Embedded Linux |
| 6. | Hands-on exercise work implementing a parallel, real-time application on heterogeneous HW/SW platform | Performance estimation, measurement, analysis and optimization. | Development tools chosen for the course implementation. |
Oppimateriaali
| Tyyppi | Nimi | Tekijä | ISBN | URL | Lisätiedot | Tenttimateriaali |
| Book | Embedded System Design - Modeling, Synthesis and Verification | Daniel G. Gajski et al | ISBN 978-1-4419-0504-8 | Available as pdf download from tut.fi domain | Yes | |
| Lecture slides | TIE-50506 Lecture Notes | Timo D. Hämäläinen | Available as pdf download in POP | Yes |
Esitietovaatimukset
| Opintojakso | P/S | Selite |
| TIE-50100 Digitaalisuunnittelu | Advisable | 1 |
| TIE-50106 Digital Design | Advisable | 1 |
| TIE-02201 Ohjelmointi 2: Perusteet | Advisable | 2 |
| TIE-02207 Programming 2: Basics | Advisable | 2 |
1 . Either English or Finnish course
2 . Either English or Finnish course
Tietoa esitietovaatimuksista
Basic knowledge of digital design and C/C++ programming is mandatory.
Vastaavuudet
| Opintojakso | Vastaa opintojaksoa | Selite |
| TIE-50506 System Design, 5 cr | TKT-2431 SoC Design, 5 cr | |
| TIE-50506 System Design, 5 cr | TKT-2437 SoC Design, 5 cr |