Course Catalog 2008-2009 International Basic Pori International Postgraduate Open University |Degrees|     |Study blocks|     |Courses|

Course´s person responsible

Jarmo Takala

Implementations

	Lecture times and places	Target group recommended to
Implementation 1	Per 2, 3 : Wednesday 14 - 16, TC133

Requirements

Written exam and completed compulsory assignment.
Completion parts must belong to the same implementation

Principles and baselines related to teaching and learning

-

Objectives

After passing the course, the students are able to design applications-specific hardware structures containing parallelism and optimize the structures for low power consumption.

Content

Content	Core content	Complementary knowledge	Specialist knowledge
1.	Data-flow graph representations and loop and iteration bounds	folding of multirate systems	solving inequalities
2.	Pipelining, parallel processing, and combined pipelining and parallel processing	Low-power optimizations
3.	Critical path, folding, unfolding, and retiming	Distributed arithmetic
4.	Systolic arrays

Evaluation criteria for the course

Written exam 70%, compulsory assignment 30%

Assessment scale:

Numerical evaluation scale (1-5) will be used on the course

Partial passing:

Completion parts must belong to the same implementation

Study material

Type	Name	Author	ISBN	URL	Edition, availability, ...	Examination material	Language
Book	VLSI Digital Signal Processing Systems: Design and Implementation	K. K. Parhi	0-471-24186-5				English
Lecture slides							English

Prerequisites

Correspondence of content

Additional information

The course is given only every other year.

More precise information per implementation

	Description	Methods of instruction	Implementation
Implementation 1		Lectures Excercises Practical works	Contact teaching: 0 % Distance learning: 0 % Self-directed learning: 0 %

Last modified	22.08.2008
Modifier	Johanna Reponen