Course Catalog 2008-2009
International

Basic Pori International Postgraduate Open University

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Course Catalog 2008-2009

TKT-3406 Computer Architecture II, 5 cr

CourseĀ“s person responsible

Fabio Garzia, Jari Nurmi

Implementations

  Lecture times and places Target group recommended to
Implementation 1


Per 4, 5 :
Thursday 10 - 12, TB223

 
 


Requirements

Written exam

Principles and baselines related to teaching and learning

-

Objectives

To provide deeper knowledge of computer and microprocessor architectures, especially parallel architectures.

Content

Content Core content Complementary knowledge Specialist knowledge
1. Media processors and multimedia support in instruction sets.     
2. Dynamic use of parallelism. Tomasulo algorithm, branch prediction, conditional execution. Instruction-level parallelism and its limitations.  Superscalar processors, speculative execution. Utilization of parallelism in software.   
3. VLIW and EPIC architectures and their compiler support. Static and compiler-assisted parallelism. Parallelism in embedded systems.     
4. Enhancing cache memory performance. Parallel memory architectures.  Memory hierarchy design.   
5. Multiprocessor architectures and thread-level parallelism. Communication and synchronization between processors and processes. Interconnections and clustering.  Performance analysis of I/O systems. Multiprocessor systems cache coherence.   


Study material

Type Name Author ISBN URL Edition, availability, ... Examination material Language
Book   Computer architecture: a quantitative approach   Hennessy, Pattersson       Morgan-Kauffman, 3rd or 4th edition      English  


Prerequisites

Course O/R
TKT-3200 Computer Architecture I Obligatory  

Prerequisite relations (Requires logging in to POP)

More precise information per implementation

  Description Methods of instruction Implementation
Implementation 1       Contact teaching: 0 %
Distance learning: 0 %
Self-directed learning: 0 %  


Last modified09.12.2008
ModifierFabio Garzia