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TKT-1566 Digital Design III, 5 cr |
Jarmo Takala
Lecture times and places | Target group recommended to | |
Implementation 1 |
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3.-n. vuosikurssi
DI-Opiskelijat Jatko-opiskelijat KV-opiskelijat Tietoliikenne-elektroniikan koulutusohjelma Tietotekniikan koulutusohjelma |
Written exam and completed compulsory assignment.
Completion parts must belong to the same implementation
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After passing the course, the students are able to design applications-specific hardware structures containing parallelism and optimize the structures for low power consumption.
Content | Core content | Complementary knowledge | Specialist knowledge |
1. | Data-flow graph representations and loop and iteration bounds | folding of multirate systems | solving inequalities |
2. | Pipelining, parallel processing, and combined pipelining and parallel processing | Low-power optimizations | |
3. | Critical path, folding, unfolding, and retiming | Distributed arithmetic | |
4. | Systolic arrays |
Written exam 70%, compulsory assignment 30%
Numerical evaluation scale (1-5) will be used on the course
Type | Name | Author | ISBN | URL | Edition, availability, ... | Examination material | Language |
Book | VLSI Digital Signal Processing Systems: Design and Implementation | K. K. Parhi | 0-471-24186-5 | English | |||
Lecture slides | English |
Course | O/R |
SGN-2010 Digitaalinen lineaarinen suodatus I | Recommended |
TKT-1210 Digitaalisuunnittelu II | Obligatory |
TKT-1212 Digitaalijärjestelmien toteutus | Obligatory |
TKT-1400 ASIC-suunnittelu I | Recommended |
Course | Corresponds course | Description |
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The course is given only every other year.
Description | Methods of instruction | Implementation | |
Implementation 1 | Lectures Excercises Practical works |
Contact teaching: 0 % Distance learning: 0 % Self-directed learning: 0 % |