Course Catalog 2008-2009 Basic Basic Pori International Postgraduate Open University |Degrees|     |Study blocks|     |Courses|

Course´s person responsible

Jarmo Takala

Implementations

	Lecture times and places	Target group recommended to
Implementation 1	Per 1 : Monday 14 - 16, TB219 Per 2 : Monday 14 - 16, TB223	3.-n. vuosikurssi DI-Opiskelijat Jatko-opiskelijat KV-opiskelijat Tietoliikenne-elektroniikan koulutusohjelma Tietotekniikan koulutusohjelma

Requirements

Final exam and compulsory exercises.
Completion parts must belong to the same implementation

Principles and baselines related to teaching and learning

-

Objectives

Understand the special features of DSP applications, and their effect on implementations, processor architectures and development tools. Learn the architectural features of DSP processors, such as finite word length and pipelining. Achieve understanding to follow the evolution of DSP processors and general purpose processors in signal processing tasks.

Content

Content	Core content	Complementary knowledge	Specialist knowledge
1.	Number representations in fixed point and floating point processors.	Finite word length effects.	Multiplier architectures.
2.	Processor architectures, assembly language programming.	ALU.
3.	Memory architectures, interfacing, addressing and address computation.	Cache memories.	Parallel memories, DRAM and SRAM structures.
4.	Pipelining principles and their effect on programming.	Instruction decoding.
5.	RISC and CISC architectures, principles of parallel and sequential computing.	Data dependence, super scalar architecture, SIMD, SISD, MIMD.	Microcoded instruction decoding.

Evaluation criteria for the course

The grade is based on the exam, exercise works, and active participation in the exercises.

Assessment scale:

Numerical evaluation scale (1-5) will be used on the course

Partial passing:

Completion parts must belong to the same implementation

Study material

Type	Name	Author	ISBN	URL	Edition, availability, ...	Examination material	Language
Book	DSP Processor Fundamentals: Architectures and Features	P. Lapsley, J. Bier, A. Shoham, E.A. Lee	0-7803-3405-1				English
Lecture slides	Lecture notes						Suomi

Prerequisites

Correspondence of content

More precise information per implementation

	Description	Methods of instruction	Implementation
Implementation 1		Lectures Excercises Practical works	Contact teaching: 0 % Distance learning: 0 % Self-directed learning: 0 %

Last modified	13.03.2009
Modifier	Jarmo Takala