Course introduces basic concepts of System-on-Chip and its division to hardware platform, software platform and application layers. Logical layers, standards and implementation of layers and interfaces are studied in detail. A practical view is given by exercises, in which a multiprocessor system is created on FPGA and used as platform for an example real-time application.
| Sisältö |
Ydinaines |
Täydentävä tietämys |
Erityistietämys |
| 1. |
System-on-Chip as a heterogeneous parallel multiprocessor system. Typical SoC architecture with fixed-function IP-blocks, processors, memories, peripherals, on-chip network. |
Modularization of HW and SW components. |
XML-based metadata for design automation. |
| 2. |
Model based design flow. Abstraction and orthogonalization of concerns. |
Code generation from UML2 models for SoC. |
UML2 Profile for SoC. |
| 3. |
Layered system model. Hardware related SoC standards for interfaces. Middleware and embedded operating systems for SoC. APIs and drivers for IP blocks. |
IP-XACT, OCP-IP, eCOS/POSIX, CORBA/e.
|
Performance and memory footprint issues in middleware and other layers. |
| 4. |
Hands-on exercise with multiprocessor SoC on FPGA. Application with hard real time requirements. |
Threading, resource management, constraining for real-time. |
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