TIE-50256 High-level Synthesis, 5 cr
Implementation TIE-50256 2019-01
Description
High-level synthesis (HLS) is the next step in raising the abstraction level of describing digital systems for FPGA/ASIC. Compared to VHDL/Verilog RTL, HLS allows a faster and more approachable design flow based on languages such as C/C++. On this course, you will learn the fundamentals of HLS and to implement real FPGA applications with it. This is a hands-on course with emphasis on practical exercises and project work.
Lessons
Period |
3 - 4
|
Methods of instruction |
Luento, Tentti, Harjoitukset |
Person responsible |
Sakari Lahti, Jarno Vanne |
Assessment scale
Numerical evaluation scale (0-5)
Requirements
Passed exam and exercises.
Exam |
Tue 05.05.2020 |
17:00 - 20:00 |
Exam |
Mon 15.06.2020 |
17:00 - 20:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 13.01.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 20.01.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 27.01.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 03.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 10.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 17.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 02.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 09.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 16.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 23.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 30.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 06.04.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/Lec/01 |
Mon 20.04.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 20.01.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 24.01.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 27.01.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 31.01.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 03.02.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 07.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 10.02.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 14.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 17.02.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 21.02.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 02.03.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 06.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 09.03.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 13.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 16.03.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 20.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 23.03.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 27.03.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 30.03.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 03.04.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 17.04.2020 |
14:00 - 16:00 |
TIE-50256 High-level Synthesis/E/01 (*) |
Mon 20.04.2020 |
12:00 - 14:00 |
TIE-50256 High-level Synthesis/E/02 |
Fri 24.04.2020 |
14:00 - 16:00 |
Study material
Type |
Name |
Author |
ISBN |
Additional information |
Language |
Examination material |
Book |
High-Level Synthesis Blue Book |
Michael Fingeroff |
978-1450097246 |
The book is available in electric format to the students |
English |
No |
Lecture slides |
|
|
|
|
English |
No |