Open University

Tampere

System-on-Chip Design, Lectures

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Advanced studies

Faculty of Information Technology and Communication Sciences

Data Processing and Information Technology

<p>Apply for Open University studies by using the following links:</p><p><ul><li><a href="https://tau-avoin.ilmoittaudu.fi/lobby/?realization=J-otm-d72cd762-34ea-4c42-a56e-1b2d5736ef5e-tampere-COMPCE250" target="_blank">COMP.CE.250 System-on-Chip Design, lectures, Tampere</a></li></ul></p><p>You can find a link to the Open University Admissions service and application instructions on the <a href="https://www.tuni.fi/en/study-with-us/open-higher-education-studies/open-university/applying-open-university">Applying to Open University studies</a> page.</p><p>Some of the studies require prior studies. For example, studying intermediate studies may require some completed basic studies. These are described on the Information about studies tab of the study unit under prior requirements.</p><p>When you have been admitted to the studies, you must enrol separately via the Sisu information system for the implementation of the unit of study and, for example if set, for a practise group of your choice. You will receive instructions on how to do this by e-mail after you have confirmed your acceptance of the study place by paying the required fee.</p>

English

Hervanta Campus

Contact teaching

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<h5>Core content</h5><ul><li>The structure of a general System-on-Chip</li><li>SoC interconnects and interfaces</li><li>SystemVerilog as a design language</li><li>The&#160;IP-XACT standard</li></ul><h5>Complementary knowledge</h5><ul><li>Power, performance, and area considerations</li><li>Clock, voltage, and power domains</li><li>Design for testability<br></li></ul><h5>Specialist knowledge</h5><ul><li>FPGA prototyping</li><li>Low-power design</li><li>Modern design tools<br></li></ul>

<p>After completing the course, the student can work as part of a SoC subsystem design team. They know the common internal interconnects and external interfaces, and the usual phases of the design project. They can analyze their design choices in terms of power, performance, and area.</p>

<h2>Prerequisites</h2><p>Basic knowledge of digital design with VHDL or Verilog is mandatory.</p><h2>Compulsory Prerequisites</h2><ul><li>Logic Synthesis, COMP.CE.240, 5 cr</li></ul>

<h5>Material</h5><ul><li>Type: Lecture slides</li><li>Author: Course teachers</li><li>Exam material: Yes</li><li>Language: English</li><li>Info: Available as PDF in Plussa</li></ul>

System-on-Chip Design, Lectures

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System-on-Chip Design, 5 cr

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System-on-Chip Design, Lectures